| Wednesday, November 26th | ||
| 08:00 | Registration | |
| 08:30 | Session 1- Opening | |
| 09:00 | Session 2- Keynote: Roger Espasa | |
| 09:30 | ||
| 10:00 | ||
| 10:30 | Coffee Break & Posters | |
| 11:00 | Session 3A: Hardware and Software for RISC-V | Session 3B: Sensing |
| 19:30 | ||
| 12:00 | ||
| 12:30 | Session 4A: Security and Power Systems | Session 4B: Signal Processing and Power Systems |
| 13:00 | ||
| 13:30 | ||
| 14:00 | Lunch | |
| 14:00 | ||
| 14:00 | ||
| 15:30 | Session 5A: AI Circuits and Systems | Session 5B: Neuromorphic Circuits, Systems and Technologies I |
| 16:00 | ||
| 16:30 | ||
| 17:00 | Session 6A: System-Level Analysis and Exploration | Session 6B: Neuromorphic Circuits, Systems and Technologies II |
| 17:30 | ||
| 18:00 | ||
| 18:30 | Free time | |
| 19:00 | Welcome Reception | |
| 19:30 | ||
| 20:00 | ||
| Thursday, November 27th | ||
| 08:00 | Registration | |
| 08:30 | ||
| 09:00 | Session 8 Keynote: Sudeep Pasricha Robust and Secure Design for Connected and Autonomous Vehicles | |
| 09:30 | ||
| 10:00 | ||
| 10:30 | Coffee Break & Posters | |
| 11:00 | Session 9A: AI-Driven Development of High-Performance Electronic Systems and Applications-1 | Session 9B: Monitoring and Control |
| 19:30 | ||
| 12:00 | ||
| 12:30 | Session 10A: Circuit Design and Analysis | Session 10B: Powering circuits |
| 13:00 | ||
| 13:30 | ||
| 14:00 | Lunch | |
| 14:00 | ||
| 14:00 | ||
| 15:30 | Session 11: Industry-University Collaboration and Technology Transfer | |
| 16:00 | ||
| 16:30 | ||
| 17:00 | ||
| 17:30 | Free time | |
| 18:00 | Social Event | |
| 18:30 | ||
| 19:00 | ||
| 19:30 | ||
| 20:00 | ||
| 20:30 | ||
| 21:00 | ||
| 21:30 | ||
| Wednesday, November 26th | ||
| 08:00 | Registration | |
| 08:30 | ||
| 09:00 | Session 13- Keynote: TBD | |
| 09:30 | ||
| 10:00 | ||
| 10:30 | Coffee Break & Posters | |
| 11:00 | Session 14A: Hardware Accelerators | Session 14B: RF & Communications: Sensing |
| 19:30 | ||
| 12:00 | ||
| 12:30 | Session 15A: AI-Driven Development of High-Performance Electronic Systems and Applications-2 | Session 15B: Quantum and low power |
| 13:00 | ||
| 13:30 | ||
| 14:00 | Session 16: Closing Ceremony | |
| 14:30 | Lunch | |
| 15:00 | ||
| 15:30 | ||
Session 1: Registration & opening
Chairs: Eugenio Villar and Frédéric Pétrot
Session 2
Keynote: Roger Espasa
Chair: Eugenio Villar
Session 3A: Hardware and Software for RISC-V
Chairs: Borja Pérez and Francesc Moll
11:00 Sara Alonso, Alejandro Arteaga, Leire Muguira, Carlos Cuadrado, Aitzol Zuloaga, Jaime Jiménez, Jesús Lázaro, José Ignacio Gárate, José Angel Araujo, Victor Martínez, Unai Bidarte and Armando Astarloa
A proof-of-concept ASIC RISC-V based SoC for Industrial Applications (abstract)
11:30 David Cantero, Alex Ugena, Laura Sanz, Alejandro Arteaga and Armando Astarloa
Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation (abstract)
12:00 Roman Cardenas, Pedro Malagon, Patricia Arroba, Josue Pagan and Jose M. Moya
RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers (abstract)
Session 3B: Sensing
Chairs: Armando Astarloa and Yolanda Lechuga
11:00 Andrea Sannino, José Ignacio Artigas and Aránzazu Otín
An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications (abstract)
11:30 Michel Justino Bai, Iñigo Adin Marcos and Markos Losada Gobantes
Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes (abstract)
12:00 Abel Reyes Cubas, David Galante Sempere and Javier Del Pino Suárez
A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy (abstract)
Session 4A: Security and Power Systems
Chairs: Jorge Portilla and Luis Parrilla
12:30 Sergio Tejeda Campos, Roberto Román, Rosario Arjona and Iluminada Baturone
Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System (abstract)
13:00 Erica Tena-Sánchez, Francisco Eugenio Potestad Ordóñez, Miguel Martín-González, Alejandro Casado-Galán and Antonio J. Acosta
Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks (abstract)
13:15 Carlos Fernández-García, Carlos J Jiménez-Fernández, Pilar Parra Fernández and Carmen Baena Oliva
A Lightweight AES Peripheral for RISC-V Cores and IoT Applications (abstract)
13:45 Pilar Cano-Lozano, Enrique Personal, Diego Francisco Larios, Samuel Dominguez-Cid, Juan Ignacio Guerrero and Carlos León
Electric vehicle emulator for study as a Distributed Energy Resource (abstract)
Session 4B: Signal Processing and Power Systems
Chairs: José Machado Da Silva and Luis Entrena
12:30 Santiago Murano, Martin Alejandro Colombo, Carlos De Marziani, Rubén Nieto Capuchino and Sofia Micaela Laskowski Orlandi
FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems (abstract)
13:00 Fermin Esparza and Antonio Lopez-Martin
CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning (abstract)
13:30 Óliver P. Westin, Rafael T. Inuoe, Anderson A. Dionizio, Leonardo P. Sampaio and Sérgio A. Oliveira da Silva
Improved Modified Zeta Inverter for Single-Phase Grid-Tied System (abstract)
Session 5A: AI Circuits and Systems
Chairs: Juan Carlos López and Fernando Herrera
15:30 Marina Cordovilla Serrano, Pablo Sánchez Espeso and Andrés Martínez Lozano
Efficient Neural Architectures for Acoustic Monitoring of Livestock (abstract)
16:00 Rubén Padial-Allué, Alberto Martín-Martín, Encarnación Castillo, Uwe Meyer-Baese, Víctor Toral, Luis Parrilla and Antonio García
1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration (abstract)
16:30 Jordi Fornt, Pau Fontova-Musté, Martí Caro, Jaume Abella, Josep Altet, Antonio Rubio and Francesc Moll
Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks (abstract)
Session 5B: Neuromorphic Circuits, Systems and Technologies I
Chair: Koldo Basterretxea
15:30 Didac Llobet, Ioannis Chatzipaschalis, Antonio Calomarde and Antonio Rubio
Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms (abstract)
16:00 Josep L. Rosselló, Christian F. Frasser, Arnau Salas-Barenys, Joan Cesari, Vincent Canals, Lluc Crespí-Castañer, Joan Font-Rosselló and Miquel Roca
A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit (abstract)
16:30 Alejandro Morán, Lluc Lluc Crespí-Castañer, Christiam F. Franco, Joan Font-Rosselló, Vincent Canals, Miquel Roca and Josep L. Rosselló
A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks (abstract)
Session 6A: System-Level Analysis and Exploration
Chairs: Roberto Sarmiento and Hector Posadas
17:00 Bernabe Linares-Barranco, Luis Alejandro Camuñas Mesa and Teresa Serrano-Gotarredona
Three decades of IMSE Neuromorphic Engineering Group (abstract)
17:30 Prathamesh Satish Deshpande, Giovanni Grandi, Stephan Schoenfeldt and Fabian Lurz
Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition (abstract)
18:00 Cristina Bermúdez Martín, Samuel López Asunción and Pablo Ituero
Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection (abstract)
Session 6B: Neuromorphic Circuits, Systems and Technologies II
Chair: Koldo Basterretxea
17:00 Markel Galarraga, Charles-Alexis Lefebvre, Jon Perez-Cerrolaza and Jose A. Pascual
Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring (abstract)
17:30 Eduardo Tomasi, César Fuguet, Christian Fabre and Frédéric Pétrot
HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation (abstract)
18:00 Jose Luis Mira Serrano, Carlos Ernesto Hernandez Orellana, Jesús Barba Romero, María Soledad Escolar Diaz, Jose Antonio de la Torre Las Heras and Fernando Rincon Calle
Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning (abstract)
Session 8: Robust and Secure Design for Connected and Autonomous Vehicles
Keynote: Sudeep Pasricha
Chair: Francisco Fernandez
Session 9A: AI-Driven Development of High-Performance Electronic Systems and Applications-1
Chairs: Pablo Sanchez and Jesús Barba
11:00 Daniel Suárez, Pedro Hernández, Víctor Fernández and Gustavo Marrero
Video Action Recognition in SoC FPGAs driven by Neural Architectural Search (abstract)
11:30 Jaime Sancho, Manuel Villa, Gonzalo Rosa-Olmeda, Alejandro Martínez de Ternero, Miguel Chavarrías, Eduardo Juárez and César Sanz
Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications (abstract)
12:00 Félix David Suárez Bonilla, Gustavo Liñán-Cembrano and José Manuel De la Rosa Utrera
Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification (abstract)
Session 9B: Monitoring and Control
Chairs: María J. Avedillo and Francisco Fernandez
11:00 Rafaella Fiorelli, Juan Núñez Martínez and Eduardo Peralías
Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation (abstract)
11:30 Amadeo de Gracia Herranz, Borja Gutierrez de Cabiedes, Javier de Mena Pacheco and Marisa Lopez-Vallejo
Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System (abstract)
11:45 Juan Luis Soler-Fernandez, Angel Diéguez, Joan Daniel Prades and Oscar Alonso
Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications (abstract)
12:15 Chih-Feng Wu, Bo-An Lin and Chi-Tien Sun
A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems (abstract)
Session 10A: Circuit Design and Analysis
Chairs: Antonio Torralba and Marcelino Santos
12:30 Juan Núñez, Rafaella Fiorelli and María J. Avedillo
Digital Ising-Based Solver for Scalable Max-Cut Optimization (abstract)
13:00 Muhammad Umer Khalid, Trond Ytterdal and Snorre Aunet
Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage (abstract)
13:30 José Manuel Cruz Acosta, Irene Merino-Fernández, Javier del Pino and Sunil L. Khemchandani
Machine Learning-Based Physical Design of RFIC Transformers (abstract)
Session 10B: Powering circuits
Chairs: Alfio Dario Grasso and Aranzazu Otin
12:30 Mukul Agarwal, Nikhil Chourasiya, Sai Sumanth Pothuri and Subodh Prakash Taigor
Novel methodology for optimization of Charge Pump efficiency (abstract)
13:00 Mehdi Shahabi, Andoni Beriain Rodríguez and Noemi Perez Hernandez
A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems (abstract)
13:30 Maria Clara Simões, Floriberto Lima, Marcelino Santos and Fábio Passos
A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications (abstract)
Session 11: Industry-University Collaboration and Technology Transfer
In this panel, the MicroNanoSpain Competence center will be presented. Then, the panelists will presents their points of view about industry-university cooperation opportunities in electronic and microelectronic research and training:
- Alfonso Gabarron, AESEMI & MicroNanoSpain Competence Center
- Ana Peláez, Maxwell
- Eduardo Casanueva, INDRA
- Constantino Ruiz, AWGE
Chair: Antonio Lopez-Martin
Session 14A: Hardware Accelerators
Chairs: Javier Uceda and Jaime Jiménez
11:00 Francisco Albertuz and Mario Garrido
Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA (abstract)
11:30 Lluís Ribas-Xirgo
Hardware implementation of the Hungarian algorithm for optimum task assignments (abstract)
12:00 Pablo Hormigo-Jimenez and Javier Hormigo
Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices (abstract)
12:15 Rubén Nieto, Silvia Iniesta, Santiago Murano, Pedro R. Fernández and Susana Borromeo
FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP (abstract)
Session 14B: RF & Communications
Chairs: Roc Berenguer and Jose Ángel Miguel Díaz
11:00 Uxua Esteban-Eraso, Gesler Ramos, Santiago Celma, Francisco José Torcal-Milla and Carlos Sanchez-Azqueta
Design of a CMOS Transmitter Chain for Satellite on the Move Communications (abstract)
11:30 Alvaro Urain, David Del Rio, Andoni Beriain, Hector Solar, Roc Berenguer and Aleksei Nerushenko
Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers (abstract)
12:00 F. Bonfiglio-Buendía, Natalia-Abel Fernández-García, P. López, Victor M. Brea and Diego Cabello
CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz (abstract)
Session 15A: AI-Driven Development of High-Performance Electronic Systems and Applications-2
12:30 Juan Gallego, José Ferreira, Luís Alves, Daniel Vázquez, João Bispo, Alfonso Rodríguez, Nuno Paulino and Andrés Otero
Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation (abstract)
13:00 Maryam Katebzadeh, Daniel Vaquez, Andres Otero and Alfonso Rodriguez
A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization (abstract)
13:30 Irene Merino-Fernandez, José Manuel Cruz Acosta, Javier del Pino and Sunil L. Khemchandani
Machine Learning for Microwave Pixelated Structures Design (abstract)
Session 15B: Quantum and low power
Chairs: Eduard Alarcon and Jose Maria Lopez Villegas
12:30 Aleksei Nerushenko, Hector Solar, Roc Berenguer and Alvaro Urain
A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz (abstract)
13:00 Ainhoa Leal, Luis Montal, Aleksei Nerushenko, Hector Solar and Roc Berenguer
A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK (abstract)
13:15 Muhammad Umer Khalid, Trond Ytterdal and Snorre Aunet
Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage (abstract)
13:45 Tom Bergmann, Joel Damiens, Alfonso Hildebrand Rueda, Stephane Lacouture, Remy Cellier and Nacer Abouchi
A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI (abstract)
